The FSB-FPGA and the Accelerated Computing Platform (ACP) are the latest developments in HPRC. These FPGAs are connected to the FSB, sharing the same bus as the multi-core processors. This architecture reduces the bottleneck of latency in moving data to and from the FPGA accelerators.
To address the issue of configurability, FSB-FPGA modules were designed with Arches MPI in mind. By using a commonly used programming API, the ACP allows the application to be truly migratable, scalable, and high performance.
ACP Components
FSB Bridge
The FSB-Base module consists of a single FPGA that plugs directly into a CPU socket. It is fully FSB aware and is able to perform memory transactions like any CPU. Since it plugs directly into the CPU socket, it achieves the high-bandwidth, low-latency communication requirements of High-Performance computing while maintaining the performance benefits of custom hardware.
FSB Compute
The FSB Compute module stacks vertically on top of the FPGA Bridge module and provides additional FPGA resources for your embedded/HPRC needs. Up to 4 additional FPGAs can be added to each FSB-Bridge module in each socket for a total of 15 FPGAs per ACP system.