Arches MPI targets parallel processes that run on HPRCs where the FPGAs are fine-grain configurable and are tightly coupled to processors. Arches-MPI accomplishes this by the principled decoupling of the hardware implementation language with language of the application. Arches-MPI enables the ACP to be truly parallel processing in a homogeneous way.
Arches-MPI enables an application can be written in C or C++ and be quickly ported. Parallel processes can synchronize and communicate transparently as to whether they are implemented as a software thread or a hardware thread. Arches-MPI takes advantage of the tight coupling of FSB-FPGA modules to processors in allocating resources. Data can be quickly transferred from one process to another.
The Arches-MPI suite is an MPI implementation consisting of a software MPI library and a hardware-based MPI-aware hardware engine. Since the communication interface between individual processes is standard MPI, many applications require minimal changes during the porting process. See our technology description for additional information.
The FPGA-based Arches-MPI implementation consists of Message Passing Engines (Arches-MPE) which are small communication blocks implemented on the FPGA fabric. They are fully MPI aware and provide an interface between any user-defined hardware engine or embedded processor and both the on-chip and off-chip communication network.